Demands for increased performance and complexity for integrated circuits have led to the development of BiCMOS integrated circuits. BiCMOS integrated circuits are circuits which include CMOS transistors for high packing density and bipolar transistors for high power and speed.
One problem with BiCMOS integrated circuits is that they are prone to damage from ESD strikes. For example, to achieve sufficient performance digital CMOS transistors in a BiCMOS circuit needed a thin gate oxide layer, typically less than 130 angstroms, however the thin gate oxide layers in the digital CMOS transistors are prone to rupture during an ESD strike
To protect against ESD strikes, ESD devices, such as Vceo diodes or Vebo diodes for bipolar circuits and NMOS or PMOS diodes or Zener diodes (if available) for CMOS circuits, have been placed between the input and output ("I/O") pins and the positive and negative voltage supply rails in BiCMOS integrated circuits. The ESD devices are nonlinear devices which present very high impedance to the integrated circuit under normal circuit operation, but quickly turn on into a very low impedance mode when the signal terminal reaches a certain threshold above the normal operating voltage. ESD energy dissipates through the ESD device by avalanche breakdown or punch-through, thereby creating a low impedance path. The breakdown voltage of the ESD device is set to be higher than the normal supply rail voltages, but sufficiently lower than the device in the integrated circuit the ESD device is designed to protect.
One example of an ESD device is disclosed in U.S. Pat. No. 5,416,351 to Ito et al. ("Ito") which is a Zener diode that is imbedded in and abuts the drain of a MOS device and which is herein incorporated by reference. With the Zener diode, the protection diode breakdown in the MOS device is determined by the breakdown voltage of the Zener diode which is nine volts. Although the ESD device in the BiCMOS integrated circuit disclosed above protects against some ESD strikes, it cannot be applied to advanced BiCMOS integrated circuits with an operating bias of five volts without an additional masking step to form a deeper and heavily doped junction under the drain. The deeper and heavily doped junction is needed to form a Zener diode. With the additional masking step the ESD device in the BiCMOS integrated circuit would operate, but the additional masking step is undesirable because it adds to a photomask count for fabricating the BiCMOS integrated circuit which is already high and expensive.